Vidatronic’s 5 nm FinFET low-power analog IP cores are specifically designed for integration into a larger SoC. These IP cores in the 5 nm FinFET process feature significant low power, low cost, power efficiency, and integration advantages for designing differentiated solutions for advanced microprocessor and high-speed serial interface applications.
5 NM FinFET IP PORTFOLIO
Vidatronic FinFET Technology Features:
- Advanced features like current-share loops to make sure multiple regulators deliver similar amounts of power to the load when there are offsets in the system as well as uneven loading profiles
- Best-in-class overshoot/undershoot of less than 30 mV while supporting up to 1 A/ns changes in load current
- Testability and calibration features to provide easy production testing/calibration support
- Easy programmability of output voltage steps through a simple programming interface
- First-pass production-worthy power-delivery systems for high-power SOCs
- Low dropout and low-power modes for high efficiency
- Many support blocks are included: Bandgap, power-on reset (POR), power-ok, DAC
- High PSRR at high frequencies to suppress ringing on the input from the package
- Distributed power delivery to allow powering of very large IPs using on-die routing resources
For added technical support or information on how to license this IP, contact us directly.